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1/11 april 2003 stp9nk90z - stf9nk90z STW9NK90Z n-channel 900v - 1.1 w - 8a to-220/to-220fp/to-247 zener-protected supermesh?power mosfet n typical r ds (on) = 1.1 w n extremely high dv/dt capability n 100% avalanche tested n gate charge minimized n very low intrinsic capacitances n very good manufacturing repeatibility description the supermesh? series is obtained through an extreme optimization of sts well established strip- based powermesh? layout. in addition to pushing on-resistance significantly down, special care is tak- en to ensure a very good dv/dt capability for the most demanding applications. such series comple- ments st full range of high voltage mosfets in- cluding revolutionary mdmesh? products. applications n high current, high speed switching n switch mode power supplies n dc-ac converters for welding, ups and motor drive ordering information type v dss r ds(on) i d pw stp9nk90z stf9nk90z STW9NK90Z 900 v 900 v 900 v < 1.3 w < 1.3 w < 1.3 w 8a 8a 8a 160 w 40 w 160 w sales type marking package packaging stp9nk90z p9nk90z to-220 tube stf9nk90z f9nk90z to-220fp tube STW9NK90Z w9nk90z to-247 tube to-220 to-220fp 1 2 3 1 2 3 to-247 internal schematic diagram
stp9nk90z - stf9nk90z - STW9NK90Z 2/11 absolute maximum ratings ( ) pulse width limited by safe operating area (1) i sd 8a, di/dt 200a/s, v dd v (br)dss ,t j t jmax. (*) limited only by maximum temperature allowed thermal data avalanche characteristics gate-source zener diode protection features of gate-to-source zener diodes the built-in back-to-back zener diodes have specifically been designed to enhance not only the devices esd capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. in this respect the zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the devices integrity. these integrated zener diodes thus avoid the usage of external components. symbol parameter value unit stp9nk90z stf9nk90z STW9NK90Z v ds drain-source voltage (v gs =0) 900 v v dgr drain-gate voltage (r gs =20k w ) 900 v v gs gate- source voltage 30 v i d drain current (continuous) at t c = 25c 8 8 (*) 8 a i d drain current (continuous) at t c = 100c 5 5 (*) 5 a i dm ( ) drain current (pulsed) 32 32 (*) 32 a p tot total dissipation at t c = 25c 160 40 160 w derating factor 1.28 0.32 1.28 w/c v esd(g-s) gate source esd(hbm-c=100pf, r=1.5k w) 4kv dv/dt (1) peak diode recovery voltage slope 4.5 v/ns v iso insulation withstand voltage (dc) - 2500 - v t j t stg operating junction temperature storage temperature -55to150 -55to150 c c to-220 to-220fp to-247 rthj-case thermal resistance junction-case max 0.78 3.1 0.78 c/w rthj-amb thermal resistance junction-ambient max 62.5 50 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 8a e as single pulse avalanche energy (starting t j = 25 c, i d =i ar ,v dd =50v) 300 mj symbol parameter test conditions min. typ. max. unit bv gso gate-source breakdown voltage igs= 1ma (open drain) 30 v
3/11 stp9nk90z - stf9nk90z - STW9NK90Z electrical characteristics (t case =25c unless otherwise specified) on/off dynamic switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. 3. c oss eq. is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss . symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d =1ma,v gs = 0 900 v i dss zero gate voltage drain current (v gs =0) v ds = max rating v ds = max rating, t c = 125 c 1 50 a a i gss gate-body leakage current (v ds =0) v gs = 20v 10 a v gs(th) gate threshold voltage v ds =v gs ,i d = 100a 3 3.75 4.5 v r ds(on) static drain-source on resistance v gs =10v,i d = 3.6 a 1.1 1.3 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds =15v , i d = 3.6 a 5.75 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds =25v,f=1mhz,v gs = 0 2115 190 40 pf pf pf c oss eq. (3) equivalent output capacitance v gs =0v,v ds = 0v to 720v 115 pf symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd =450v,i d =4a r g = 4.7 w v gs =10v (resistive load see, figure 3) 22 13 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd =720v,i d =8a, v gs =10v 72 14 38 100 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 450 v, i d =4a r g =4.7 w v gs =10v (resistive load see, figure 3) 55 28 ns ns t r(voff) t f t c off-voltage rise time fall time cross-over time v dd = 720v, i d =8a, r g =4.7 w, v gs = 10v (inductive load see, figure 5) 53 11 22 ns ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm (2) source-drain current source-drain current (pulsed) 8 32 a a v sd (1) forward on voltage i sd = 8 a, v gs =0 1.6 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 8 a, di/dt = 100a/s v dd =50v,t j = 150c (see test circuit, figure 5) 950 10 21 ns c a
stp9nk90z - stf9nk90z - STW9NK90Z 4/11 thermal impedance for to-247 safe operating area for to-247 thermal impedance for to-220fp safe operating area for to-220fp safe operating for to-220 thermal impedance for to-220
5/11 stp9nk90z - stf9nk90z - STW9NK90Z gate charge vs gate-source voltage capacitance variations static drain-source on resistance transfer characteristics transconductance output characteristics
stp9nk90z - stf9nk90z - STW9NK90Z 6/11 maximum avalanche energy vs temperature normalized bvdss vs temperature source-drain diode forward characteristics normalized on resistance vs temperature normalized gate threshold voltage vs temp.
7/11 stp9nk90z - stf9nk90z - STW9NK90Z fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
stp9nk90z - stf9nk90z - STW9NK90Z 8/11 dim. mm inch min. typ. max. min. typ. max. a 4.40 4.60 0.173 0.181 c 1.23 1.32 0.048 0.051 d 2.40 2.72 0.094 0.107 d1 1.27 0.050 e 0.49 0.70 0.019 0.027 f 0.61 0.88 0.024 0.034 f1 1.14 1.70 0.044 0.067 f2 1.14 1.70 0.044 0.067 g 4.95 5.15 0.194 0.203 g1 2.4 2.7 0.094 0.106 h2 10.0 10.40 0.393 0.409 l2 16.4 0.645 l4 13.0 14.0 0.511 0.551 l5 2.65 2.95 0.104 0.116 l6 15.25 15.75 0.600 0.620 l7 6.2 6.6 0.244 0.260 l9 3.5 3.93 0.137 0.154 dia. 3.75 3.85 0.147 0.151 l6 a c d e d1 f g l7 l2 dia. f1 l5 l4 h2 l9 f2 g1 to-220 mechanical data p011c
9/11 stp9nk90z - stf9nk90z - STW9NK90Z l2 a b d e h g l6 f l3 g1 123 f2 f1 l7 l4 l5 dim. mm. inch min. typ max. min. typ. max. a 4.4 4.6 0.173 0.181 b 2.5 2.7 0.098 0.106 d 2.5 2.75 0.098 0.108 e 0.45 0.7 0.017 0.027 f 0.75 1 0.030 0.039 f1 1.15 1.5 0.045 0.067 f2 1.15 1.5 0.045 0.067 g 4.95 5.2 0.195 0.204 g1 2.4 2.7 0.094 0.106 h 10 10.4 0.393 0.409 l2 16 0.630 l3 28.6 30.6 1.126 1.204 l4 9.8 10.6 .0385 0.417 l5 2.9 3.6 0.114 0.141 l6 15.9 16.4 0.626 0.645 l7 9 9.3 0.354 0.366 ? 3 3.2 0.118 0.126 to-220fp mechanical data
stp9nk90z - stf9nk90z - STW9NK90Z 10/11 dim. mm. inch min. typ max. min. typ. max. a 4.85 5.15 0.19 0.20 a1 2.20 2.60 0.086 0.102 b 1.0 1.40 0.039 0.055 b1 2.0 2.40 0.079 0.094 b2 3.0 3.40 0.118 0.134 c 0.40 0.80 0.015 0.03 d 19.85 20.15 0.781 0.793 e 15.45 15.75 0.608 0.620 e5.45 0.214 l 14.20 14.80 0.560 0.582 l1 3.70 4.30 0.14 0.17 l2 18.50 0.728 ?p 3.55 3.65 0.140 0.143 ?r 4.50 5.50 0.177 0.216 s5.50 0.216 to-247 mechanical data
11/11 stp9nk90z - stf9nk90z - STW9NK90Z information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2003 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com

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